In-Depth Dialogue: Dr. Yang, Director of Advanced Technology R&D at Halo Micro, Decodes the Frontiers of Power Electronics at APEC

March 27, 2026

Q1: Dr. Yang, welcome! As a veteran who has represented Halo Micro at APEC—the premier bellwether event for global power electronics—for several consecutive years, what were the standout highlights for you this year? And why does this event consistently attract top global players?

A: The core highlight this year is the "mutual synergy between AI and power electronics"—specifically, the fusion of "Power for AI" (powering AI computing) and "AI for Power Electronics" (using AI to optimize power design). The former focuses on meeting the critical power demands of compute-intensive AI scenarios, driving innovation in high-density power solutions. The latter leverages AI algorithms to boost power efficiency and accelerate development cycles, fundamentally redefining design logic. APEC’s enduring appeal lies in its ability to consistently capture industry inflection points: from early PCs and servers to smartphones, and now to AI computing, smart vehicles, and robotics. It serves as the ultimate gathering place for top-tier technologies, customers, and ecosystem resources.

Q2: Halo Micro has been a regular at APEC for years. What core values draw you back, and what role do you see APEC playing in the global power electronics supply chain?

A: Our sustained participation is driven by two main factors: (1) Trend insights: APEC’s exhibitions and forums allow us to track cutting-edge global power solutions and drive our own technological iterations through industry exchange; (2) Ecosystem expansion: It provides a platform to connect with industry peers and upstream/downstream partners, fostering strategic collaborations that enrich our technology ecosystem. APEC effectively serves as an incubator for industry standards and a global hub for collaboration—making it the true "connector" and bellwether of the power electronics industry.

Q3: Compared to previous years, what new shifts have you noticed in the exhibitor roster and technical showcases? What underlying industry trends do these reflect?

A: The most notable shift this year is the transition from "traditional board-level power supply" to "chip/package-level architectures" and "system-wide high-voltage adoption." For instance, in the AI server sector, leading companies are aggressively exploring Vertical Power Delivery (VPD) architectures to break the bottlenecks associated with traditional Lateral Power Delivery (LPD).

At the distribution level, to handle the ultra-high power demands per rack driven by AI computing (such as NVIDIA’s Kyber racks, which exceed 0.5MW), data centers are actively transitioning to 800V DC bus distribution architectures. This reduces current ratings, cuts down copper usage in PCBs and cables, and improves overall efficiency. Ultimately, these changes signal an industry-wide pivot toward higher power density, advanced chip integration, and minimized system losses.

Q4: Based on this year’s exhibits and technical sessions, what are the three most significant trends currently shaping the power electronics industry?

A: 1. Power for AI (The Compute Power Delivery Revolution): This is centered entirely on Vertical Power Delivery (VPD) for AI server xPUs. With GPU power consumption approaching 3–5kW and current demands nearing 10,000A, traditional LPD is hitting insurmountable thermal bottlenecks. The industry is accelerating its shift toward Fully Integrated Voltage Regulators (FIVRs), vertical chip stacking, and embedded passive components. 2. AI for Power Electronics (Disrupting Traditional Design): A great example is the MagNet Challenge 2 winners of which are awarded at this conference, which utilized machine learning and digital twins for data-driven magnetic component modeling. This approach optimizes high-frequency loss prediction and system reliability, breaking past the limitations of physics-based empirical design. 3. Deep Integration of 800V DC Architecture and Wide-Bandgap Devices (SiC/GaN): To manage the surging power loads in AI racks, data centers are rapidly adopting 800V DC bus architectures to slash current ratings and copper losses. Simultaneously, EVs are broadly deploying 800V high-voltage powertrains. In this system-wide transition to high voltage, SiC and GaN—thanks to their distinct advantages in high-voltage, high-frequency environments—have become the foundational pillars supporting the entire 800V ecosystem.

Q5: Among these trends, which area of demand has grown more unexpectedly than others, and what is driving it?

A: The most unexpected surge in demand has been for "miniaturization and thermal management under extremely high currents." The primary driver is the explosive need for compute chips to train Large Language Models (LLMs). Not only has the Thermal Design Power (TDP) of xPUs multiplied in just a few years, but the requirements for rapid current transient response (di/dt) have also risen sharply. This forces Voltage Regulator Modules (VRMs) to evolve toward seamless integration—often embedding directly into compute chip packages. This shortens power delivery paths, reduces energy losses, and strikes a critical balance between compact sizing and robust heat dissipation.

Q6: How has Halo Micro positioned itself ahead of the curve to address these emerging trends?

A: Anticipating the power bottlenecks caused by the AI compute explosion, Halo Micro initiated forward-looking strategic investments years ago, specifically focusing on what is now the hottest topic: Vertical Power Delivery (VPD). We recognized early on that overcoming the thermal limitations of LPD required foundational architectural innovation, which led us to actively collaborate with top international universities to pioneer next-generation power delivery architectures.

Q7: You mentioned strategic investments. Could you share an example of a technology where Halo Micro invested 3–5 years in advance, and whose value is now being validated at platforms like APEC?

A: A prime example is the patent (US12224665B2) jointly developed by Halo Micro and Princeton University. To address the extreme demands of AI computing systems (like GPUs) for high current and high-voltage conversion ratios (such as direct 48V-to-sub-1V conversion), we proposed an innovative power conversion system. It utilizes a two-stage Intermediate Bus Architecture (IBA) that combines switched-capacitor input units, interleaved multi-level voltage rails, and inductor links. This achieves highly efficient conversion under high voltage stress and large currents, drastically reducing power losses in AI compute load networks.

This early investment was heavily validated at this year’s APEC. Our academic collaborator and patent co-inventor was actually a keynote speaker and leader of the "Power for AI" core topic track. More importantly, global tech giants are now intensely focused on advancing VPD architectures for AI server xPUs—a direction that perfectly aligns with our early exploration of "48V-to-chip-level high-ratio conversion and VPD." Halo Micro now possesses the core technological foundation to not only resonate with global leaders but to lead the frontier of "Power for AI" architecture.

Q8: For Chinese power electronics companies competing globally, how do platforms like APEC offer opportunities to "leapfrog the competition"?

A: Global power electronics is currently undergoing a fundamental reshaping of its underlying architecture, presenting a massive window of opportunity for Chinese enterprises. On one hand, the industry is facing disruptive change: AI servers are tossing out traditional power standards in pursuit of compute, exploring new architectures like VPD and high-current FIVR chips, while wide-bandgap semiconductors (SiC/GaN) are rewriting topologies in automotive and robotics.

On the other hand, APEC highlights "technological white spaces"—areas that represent the future but lack unified, standardized solutions. For Chinese enterprises, the key to leapfrogging the competition is to leverage APEC to identify these industry pain points, and then utilize China’s strengths in rapid iteration, customer demand response, supply chain synergy, and cost-efficiency to commercialize solutions first. This is how you gain a dominant foothold in next-gen AI infrastructure and new energy sectors.

Q9: Thank you, Dr. Yang, for those deep insights! Finally, could you summarize Halo Micro’s core objective at APEC in one sentence, along with your hopes for the future of the industry?

A: Halo Micro’s core objective at APEC is to engage deeply in global industry dialogue, solidify our technological breakthroughs and R&D leadership in power management and analog chips, and ultimately serve as the "core power engine" driving innovation in the AI and electrification era. Looking ahead, I hope the industry—driven by the dual forces of "Power for AI" and "AI for Power Electronics"—will shatter traditional design limits, shifting power management from isolated conversion into a deeply synergistic relationship with underlying chips, 3D packaging, and compute architecture. Halo Micro is ready to partner with our global peers to bridge the technology gap and build a new era of power electronics that is highly optimized, intelligent, and sustainable!

About Halo Microelectronics
Halo Microelectronics(Stock Code: 688173) develops analog and power management integrated circuits enabling energy-efficient smart systems. Since 2012, Halo Microelectronics has been driving innovation in Mobile, IoT, and Automotive systems. Find out more at: http://www.halomicro.com.

None

Halo Microelectronics Wins "Annual Best Solution Award" at 2026 Semiconductor Investment Annual Conference & IC Power List Awards

None

Halo Microelectronics Wins "Annual Best Solution Award" at 2026 Semiconductor Investment Annual Conference & IC Power List Awards

Company WeChat Official Account

中企跨境-全域组件 2.0 制作前进入CSS配置样式

CSS / JS 文件放置地